Extensive research and development work is currently being devoted to applications whereto the availability of integrated DC/DC converters characterized by high conversion efficiency, .eta.=80-90%, is of primary value, especially with step-up topologies.
This requirement is more stringent in applications that involve battery-powered apparatus such as pagers, cellular phones, portable computers, and more generally long-range portable apparatus wherein a battery voltage is to be converted to a stabilized voltage of higher value with superior efficiency.
To this aim, it is common practice to use switch elements with very low resistance Ron and high switching rate, that is active elements such as MOSFETs or bipolar transistors in lieu of loop-back diodes.
Converters of this type are referred to as synchronous rectification converters; this means that a control logic must be implemented which can provide for truly synchronous opening and closing of the switch elements, i.e., prevent a simultaneous actuation thereof (cross-conduction) which would result in significant waste of power or unacceptable loss of performance.
A conventional DC/DC converter architecture in a step-up configuration is shown schematically in FIG. 1.
The loop-back element used therein consists of a diode D for transferring energy from the magnetic field of the inductor L to the output capacitor C and the load Z.sub.O. An examination of the topology illustrated reveals at once that no regulated output voltage can be obtained which will be lower than the supply voltage minus the voltage drop across the conductive diode (V.sub.BEON).
This places a limitation on the use of this basic circuit in a mixed step-up/step-down configuration. In addition, the use of the diode D represents a loss factor and heavily curtails the conversion efficiency, due to the voltage drop across it during the ON phase.
For example, where an average current Iout=1A is transferred to the load, with Vout=5V, using a diode at V.sub.BEON =0.7V, the average power loss would be PD=700 mW and add to that of 500 mW dissipated through the switch during the switching phase, for a power Pout=Vout*Iout=5W being transferred to the load. This produces an efficiency .eta.=80% (Pout/Pin) which is unacceptable for the purpose of long-range battery powering.
A known approach to improving the conversion efficiency .eta. consists of using a Schottky barrier diode characterized by a short recovery time and low values of V.sub.BEON .congruent.0.35-0.5V.
In this way, efficiency values of .eta..congruent.83-85% can be achieved in connection with the above example.
Despite its improved efficiency, this topology has a limitation in that the output voltage cannot be regulated when set to values below Vin-V.sub.BEON.
A further improvement in efficiency can be obtained in the prior art by using active switch elements (pass transistors or MOSFETs) instead of the loop-back diode, as shown in the exemplary circuit of FIG. 2.
The use of an active switch element in place of the loop-back element (diode D) reduces the voltage drop during the transfer of power to the load by a V.sub.CESAT .congruent.0.2-0.5V where a bipolar transistor is used, or by a V.sub.DSON .congruent.0.2-0.3V where a power MOSFET is used.
FIG. 2 is a schematic diagram of a synchronous rectifier circuit as applied to a step-up topology employing a P-channel power MOS 20 as the switch element. Besides the control logic 21, sequencing and timing the actuation of the switches 20 and 22, an element sensing the current being delivered to the load (R.sub.SENSE) is shown in a comparator block 23 operative to control the transfer of power by sending a suitable signal to the control logic.
The signal from the comparator block 23 prevents the power MOS 20 from also transferring power from the load to the input, and thereby reversing the current direction and frustrating all efforts to attain enhanced efficiency.
Keeping this phenomenon under control becomes specially important in a discontinuous mode of operation, wherein the step-up topology is utilized more frequently.
Moreover, the resistor R.sub.SENSE introduces an additional power loss equal to Iout*R.sub.SENSE. This may be unacceptable in certain cases (e.g., in high current applications) by itself.
The reason for using a P-channel power MOS as the switch element is the low R.sub.DSON of the power PMOS and the ability to provide a voltage drive rather than a current drive.
Unfortunately, and as brought out by FIG. 2, the body connection of the power PMOS introduces a large-size diode (having the same area as the total area of the power PMOS well) between the input and output terminals. During the start-up phase, with the output voltage still close to zero, this large diode allows a current to pass whose maximum value may far exceed the peak value in steady-state operation (inrush current), and has destructive effects on the passive components (inductor L) unless these are provided oversize in order to survive the initial transient phase.
Accordingly, this would involve increased size for the inductor L and the printed circuit connection layout, as well as increased cost and a heavily stressed power supply. The last-mentioned aspect greatly restricts the possible range of battery powered apparatus. A reduction of the maximum value of the inrush current, as obtained by means of a limiter resistor, if safeguarding the integrity of the components, would bring about unacceptable power losses.
Lastly, the presence of the parasitic diode again would make regulation of the output voltage impracticable at values below Vin-V.sub.BE (step-down configuration).
Thus the prior art solutions, although providing highly efficient step-up converters, have certain limitations and deficiencies, such as complex control logic circuitry, the effects of possible cross-conduction phenomena, and the impossibility of implementing a mixed step-up/step-down mode of operation.